The PCMOS system, designed by Rice University researchers, promises a speed increase of 700% at a thirtieth of the power demands. How, you ask? Well, transistors today are very tiny and use a lot of power to make sure that the intentional signal overpowers the random noise at that near-molecular scale. This is getting harder and harder, as transistor counts multiply and voltage per transistor increases as well, processors are getting hotter and more power hungry by the generation.
The creators of PCMOS think that by using “probabilistic logic” and accounting for noise in a different way, they can do a huge amount more work with a given amount of silicon. The system for such logic (an alternative to Boolean) is proprietary, of course, but the basics of it suggest that it may be suitable for tasks which do not require absolute precision or exact calculation. Decoding or showing a video stream, for instance, is something that, pixel by pixel, could be “estimated” and misplaced pixels would be quickly eclipsed by the next frame or ignored by our natural tolerance for such things.
The system is obviously not for everything, and it won’t be showing up as a desktop processor. But for things that need to have something low-power and aren’t doing anything terribly important (decoding the digital signal for a cell phone, for instance), they could increase both performance and battery life.
It’s all pie in the sky, however, until they get a product on the market (years); likely you won’t hear about it when it happens, or it will have a snazzy brand name. But it’s got DARPA and Intel behind it, so you know it’ll end up somewhere.
New form of processor will make errors at hugely increased speeds
Posted by ptc | Sunday, February 22, 2009 | 0 comments »
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